Skyline Computation for Low-Latency Image-Activated Cell Identification

Authors

  • Kenichi Koizumi The University of Tokyo
  • Kei Hiraki The University of Tokyo
  • Mary Inaba The University of Tokyo

DOI:

https://doi.org/10.1609/aaai.v32i1.12134

Abstract

High-throughput label-free single cell screening technology has been studied for noninvasive analysis of various kinds of cells. We tackle the cell identification task in the cell sorting system as a continuous skyline computation. Skyline Computation is a method for extracting interesting entries from a large population with multiple attributes. Jointed rooted-tree (JR-tree) is continuous skyline computation algorithm that manages entries using a rooted-tree structure. JR-tree delays extend the tree to deeper levels to accelerate tree construction and traversal. In this study, we proposed the JR-tree-based parallel skyline computation accelerator. We implemented it on a field-programmable gate array (FPGA). We evaluated our proposed software and hardware algorithms against an existing software algorithm using synthetic and real-world datasets.

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Published

2018-04-29

How to Cite

Koizumi, K., Hiraki, K., & Inaba, M. (2018). Skyline Computation for Low-Latency Image-Activated Cell Identification. Proceedings of the AAAI Conference on Artificial Intelligence, 32(1). https://doi.org/10.1609/aaai.v32i1.12134